This invention is directed to methods of making semiconductor devices, and more particularly to multilevel insulation between polysilicon layers in MOS integrated circuits.
In early semiconductor integrated circuits, resistors were provided by diffused regions or by portions of the semiconductor substrate which were defined by etching, as seen in U.S. Pat. No. 3,138,743 issued to Jack S. Kilby and assigned to Texas Instruments . As the density of components in integrated circuits grew, the area occupied by resistors became prohibitive, so logic forms were favored which used few resistors or no resistors. For example, "TTL" or transistor-transistor logic and I.sup.2 L or integrated injection logic in bipolar technology had features minimizing the area on a bar dedicated to resistors. In MOS logic and memories, transistors are used as load devices or in effect as resistors. Examples of every complex MOS ciruits containing many thousands of transistors but no resistors in a single chip digital processor or memory are shown in U.S. Pat. No. 3,940,747, issued to Kuo and Kitagawa and U.S. Pat. No. 3,998,604, issued to J. H. Raymond, Jr., both assigned to Texas Instruments.
High density MOS memory devices such as the 4096 bit memory described in U.S. Pat. No. 3,940,747, or the "16K' or 16,384 bit memory described in U.S. Pat. No. 4,050,061, assigned to Texas Instruments, have been of the dynamic type because dynamic one-transistor cells are the smallest in area.
In some parts of digital equipment, however, the referesh circuitry required for dynamic memories is incompatible or undesirable, so static memory is preferred. Static cells traditionally employ six-transistor bistable circuits wherein depletion-load MOS transistors are used as load devices. These cells are much larger than the one-transistor cells of dynamic memory devices, so the density is less. Also, power dissipation is high due to the requirement that some current must flow through one side of each cell in the array to maintain the stored data.
In U.S. Pat. No. 4,246,692 by G. R. Mohan Rao, assigned to Texas Instruments, there is disclosed a resistor element particularly for a static RAM cell wherein the resistors are implanted regions buried beneath field oxide. In application Ser. No. 727,116, filed Sept. 27, 1976 by Rao, Stanczak, Lien and Bhatia, now U.S. Pat. No. 4,110,776 assigned to Texas Instruments, a static cell using implanted resitors in polycrystalline silicon over field oxide is described. While these inventions represent marked improvements, further reduction in cell size is needed for arrays of the 16K or larger size.
It is a principle object of this invention to provide an improved method of making resistor elements in integrated circuits. Another object is to provide a method of making an improved small area static RAM cell for MOS memory devices of high density. An additional object is to provide small area, high resistance load elements for transistors in semiconductor integrated circuits.